STPSim: Accelerating Circuit Simulation via Semi-Tensor Product-Based Parallelism

Recently, semi-tensor product (STP)-based simulators have shown promise by representing logic functions as matrices and performing Boolean operations via matrix multiplication. However, STP approaches face practical challenges, prolonged computation times from continuously expanding internal matrices. This paper presents a novel method for accelerating STP computation to enable more efficient simulation through optimized matrix operations for direct truth table construction. The proposed approach minimizes the size of identity matrices and reconstructs the truth table during canonicalization, effectively reducing matrix dimensions and enhancing STP computation speed. Additionally, a fine-grained matrix partitioning algorithm is introduced, specifically designed for GPU architectures, which dynamically distributes sub-matrix computations across GPU cores. This method is integrated into a state-of-the-art STP simulator, and experimental results demonstrate a performance improvement of 7.79× after its application.