Hardware-Software Co-Design for Resource Efficient Gesture Classification System for FPGAs

Convolutional Neural Network (CNN)-based human activity recognition has gained significant attention in the domain of activity behavioral computing and human-computer interaction. Field Programmable Gate Array (FPGA)-based gesture recognition and classification systems efficiently process complex behaviors with low latency and reduced power consumption. This paper presents a custom CNN-based hardware-software co-design for a resource-efficient gesture classification system for FPGAs. The proposed system has been evaluated using the American Sign Language (ASL) dataset, achieving an accuracy of 99.63%. In addition, hardware evaluation of the proposed CNN accelerator demonstrates lower resource utilization, including a 14% reduction in LUTs, a 31% reduction in DSP usage, and an 86% reduction in BRAM consumption compared to the state-of-the-art gesture recognition system while operating at a power consumption of 4.2W in Xilinx Vivado 2023.1. The hardware-software co-design approach optimizes CNN-based gesture classification by integrating model optimization with hardware acceleration. By embedding training parameters within the CNN Intellectual Property (IP) core and deploying it on an FPGA, the system enables real-time inference while optimizing memory and computational resources, making it a suitable solution for embedded artificial intelligence and edge computing applications.