FEM-FTT Method for Wire-Level Temperature Estimation and its Application on Refined Reliability Assessment of MMC submodule IGBTs

Modular Multilevel Converters (MMCs) comprise numerous submodules with insulated gate bipolar transistors (IGBTs) to achieve high voltage endurance. The temperature distribution across different bond wires is influenced by their position on single chip. Conventional lumped thermal circuit models can only predict the average junction temperature of the chip instead of that across the wires, which only enable switch-level reliability, leading to lifetime overestimation issues. In this study, a finite element model with the frequency-time transform (FEM-FTT) method is developed at first to predict the periodic temperature distribution of IGBT modules, enabling efficient temperature translation of individual bond wire. This method is proven to be ten times faster than the traditional time-domain FEM model. Therefore, a refined reliability assessment approach is proposed in terms of wire-level variations. Case study using annual mission profile from a practical MMC-HVDC project indicates that B_10% lifetime estimated by the wire-level assessment method is 20% lower than that from transitional switch-level method. The temperature difference (maximum 13.6°C) across paralleled bond wires on the same chip is dominant compared with temperature differences (maximum 1.4°C) among paralleled chips, resulting in 34% variation in B_10% lifetime. The variations in electrical parameters, ambient temperature, and lifetime models are also considered through a Monte Carlo analysis.