Total Ionizing Dose Hardening Methodology in Back Gate Embedded SOI MOSFETs With Ultrathin Buried Oxide

A novel total ionizing dose (TID) hardening method is proposed based on the innovative back gate embedded silicon on insulator (BGESOI) technology. By elaborately designing the manufacturing process, the symmetric split gate configuration is constructed within the standard CMOS platforms. Notably, the BGESOI MOSFET features ~6nm buried oxide, which is thinner than that in typical fully depleted silicon on insulator (FDSOI) devices, thereby achieving enhanced TID tolerance. The device exhibits a threshold voltage ( ${V}_{\text {th}}\text {)}$ shift of around -30mV @7Mrad(Si) which can be further compensated by adjusting the back gate bias by only ~80mV thanks to its ultrahigh body factor ( $\ge 350$ mV/V). This work presents a promising solution for robust TID hardening in extremely harsh radiation environments.