A novel technique for Software Fault Injection Testing through FPGA code instrumentation for verification and validation of software on-board launch vehicles and spacecraft

Software Fault Injection Testing (SFIT) is a technique used in verification & validation (V&V) in order to test the error handling logics in the software on-board launch vehicles (LV) and spacecraft (S/C). The on-board software has built-in error handling mechanisms that detect various hardware failures and to gracefully exit in case of an error. It is strenuous to validate such error handling logics, as they manifest only in case of actual hardware failures. Traditionally, this issue is tackled in SFIT via instrumentation of on-board processor based code, to simulate failures and to direct the control flow through error handling paths. Typically, On-board Computer (OBC) for LV& S/C is realized with microcontroller, microprocessor and FPGA as master controllers. Usually, software executing in the processor performs the tasks for navigation, guidance and control using complex algorithms. Incidentally, FPGA acts as a memory mapped peripheral to the on-board processor. The digital logic implemented in the FPGA using register transfer level (RTL) coding does the tasks of data acquisition and communication with external world by interfacing with various hardware devices. With the advancement in the FPGA manufacturing technology, FPGAs with large resources are available today. So, many complex algorithms and error handlings, which till date were done by processor based code, are now being implemented in contemporary FPGAs. Existing V&V techniques adopt instrumentation of processor code for SFIT, as the code can be programmed multiple times into EPROM/flash. One time programmable FPGAs makes it difficult to instrument the RTL code for SFIT, as each code instrumentation require replacement of costly FPGAs. In recent times, there is a paradigm shift in the FPGA technology for space applications from one time programmable to reprogrammable. This extends the scope of fault injection testing to FPGA based software. This paper depicts a novel technique to carry out SFIT through FPGA code instrumentation which facilitates the V&V of software residing LV & S/C on-board computer housing reprogrammable FPGAs.