A 76.5-dB Dynamic-Range 8-bit 100-MS/s Variable-Range SAR ADC

This work presents an 8-bit 100 MS/s SAR ADC with a 35 dB variable input range. The range tunability is realized by fully passive switched-capacitor-based circuits integrated with CDAC. Programmable capacitive dividers that narrow down the full-scale range of the CDAC and capacitor stacking circuits that amplify the input signal without an active amplifier are used in combination to achieve a wide tunable input range. Fabricated in 65nm CMOS, the proposed ADC consumes up to 0.599 mW at 100 MS/s and achieves 48.7 dB SNDR and 65.6 dB SFDR with Nyquist input. SNDR remains > 40 dB over the input signal amplitude ranges from -35 to 0 dBFS, which leads to a 76.5 dB dynamic range, yielding a Schreier FoM of 185.7 dB.