Ultra-Low Power and High-Speed Dadda Multiplier using GDI-Optimized 4:2 Exact Compressor

With the rapid advancement of modern digital systems, the demand for high-speed and energy-efficient arithmetic circuits has escalated. This paper presents an optimized 8-bit Dadda multiplier, which incorporates the Gate Diffusion Input (GDI) technique along with a 4:2 exact compressors to enhance both power efficiency and computational speed. The proposed design minimizes power consumption and propagation delay while ensuring precise computation. The architecture is implemented using Cadence Virtuoso in 90nm CMOS technology, and the performance is benchmarked against conventional multipliers, exhibiting notable improvements in energy efficiency and processing speed. This paper also discusses the theoretical background of Dadda multipliers, the advantages of GDI in arithmetic logic design, and the impact of exact compressors on power consumption and area efficiency.