Semi-Pipelined CORDIC Framework: FPGA and ASIC Implementation for Real-Time Applications

Trigonometric computations are crucial in digital applications, especially real-time tasks. The Coordinate Rotational Digital Computer (CORDIC) method is key for these calculations and finds applications in Fast Fourier Transform Discrete Cosine Transform and more. However, CORDIC implementation is challenging due to its operational complexity and intricate mathematical processes. This study focuses on implementing a semi-pipelined embedded CORDIC framework in both Field Programmable Gate Array (FPGA) and Application-Specific Integrated Circuit (ASIC) for real-time applications like radar signal processing, communications engineering, and robotics. The semi-pipelined embedded CORDIC system aims to reduce hardware resource usage and balance calculation time. This is achieved through the selective combination of low-power carry to optimize addition functions, thereby decreasing both area utilization and power consumption. The proposed method is compared with existing designs, demonstrating superior results in terms of area, power efficiency, and delay.