Voltage Overshoot Reduction for Bidirectional Switches in Current Source Inverters

Using fast switching transistors, especially GaN-based devices in current source inverters offers many advantages and enables efficient solutions, but also rises new challenges because of the specific device parameters. One of the leading design challenges is the reduction of voltage overshoot during the switching process, which is particularly problematic using low voltage devices with high currents. The voltage overshoot is highly dependent on parasitic elements in the PCB layout, which must be minimized in the design process. This paper discusses the specific design parameters, which influence the voltage overshoot in a GaN-based current source inverter with bidirectional blocking switches in a common source configuration. The layout is designed with minimal parasitic elements in the active commutation loops and further a method for a snubber circuit design is presented. The results are verified by an experiment.