Efficient Implementation of 2D Interleavers in Embedded Systems Using In-Memory Computing

This paper explores the realization of twodimensional (2D) interleavers and deinterleavers using inmemory computing (IMC) to enhance the performance and efficiency of embedded systems. By leveraging the unique capabilities of IMC, such as reduced latency and energy consumption, the proposed approach aims to optimize data processing in interleaving operations, which are essential in communications and error correction schemes. The initial results demonstrate significant improvements in throughput, latency, and power efficiency, making IMC a promising solution for modern embedded applications requiring high-performance data manipulation.