3-D Packaging Technologies for Advanced Integrated Photonics Modules: A Review

Recent developments in photonics applications, in the fields of datacom, high-performance computing, and integrated optical sensors, have accelerated the trend toward electronic/optical convergence announced over ten years ago. The growing maturity of silicon photonics and its use in conjunction with advanced packaging techniques (3-D stacking, through silicon via (TSV), and fan-out wafer-level packaging) have contributed to the emergence of two new objects that are becoming standards: co-packaged optics (CPOs) and photonic interposers, both leveraging photonic chiplets. This article reviews the emergence of these two objects, as well as the most recent achievements.