An SoC Design and Fabrication Hands-On Educational Course within One Week Using Structured ASIC

Since the design and manufacturing of semiconductor chips takes a considerable amount of time, it is difficult to fully understand the entire process and conduct student experiments that provide a hands-on experience of chip creation. The lack of student experiments that allow beginners to easily experience the process from chip design to manufacturing is one of the reasons why there are few students interested in semiconductor research. This, in turn, exacerbates the shortage of skilled workers in the semiconductor industry. The Agile-Chip platform is a method that enables the rapid and low-cost production of small quantities of chips by manufacturing only the top wiring layer using minimal fab technology on cut wafers, which are pre-cut from mass-produced wafers except for the top-most wiring. In this paper, we propose a student experiment method for semiconductor beginners using the Agile-Chip platform and provide an implementation example. For the base chip, a gate array is used, which allows the configuration of various gates using only the top wiring layer. The students design a 61-stage ring oscillator using the gate array, verify its operation through simulation, and then proceed with the corresponding layout design. After confirming the consistency of both, they generate a GDS file. This wiring layer is then fabricated either in a minimal fab or a cleanroom, and finally, the chip is mounted on a substrate for measurement.