Polysilicon trench etch in memory device

With the increase of memory density, the small cell size brings many key challenges such as mask selectivity and profile control due to the reduction of critical dimension and higher aspect ratio. To face these challenges, a cyclic etching process consisting of etching step, break through step, and oxidation treatment step has been proposed and applied to polysilicon etching in memory flow. The effects of RF power, gas ratio, temperature, and pressure on etching characteristics are discussed. Research has found that the degree of anisotropic profile control depends on the etching rate and the physical and chemical reaction balance of thin film deposition, sputtering, and etching. The selectivity of the hard mask is related to the BRF power and the Cl2/HBr gas ratio during the etching process. This will provide a good reference for the etching of capacitors in the next generation memory device.