Investigation of Selector Characteristics for Scalable 1S1R Array

In this study, we investigate the relationship between selector characteristics and the scalability of one-Selector-one-RRAM (1S1R) arrays. A 1S1R behavioral model is constructed using Verilog-A and the impact of selector characteristics on the performance of the 1S1R device is evaluated based on the characteristics of the 40 nm RRAM device. Furthermore, requirements for selectors in large-scale arrays are discussed based on the aforementioned models, revealing that an Ioff down to hundreds of nA is demanded to realize a 1Mb 1S1R array.