Quad Core Processor Level-2 Cache Verification Using a Californium-252 Source

During the design phase of a fault-tolerant LEON4 quad-core processor ASIC for space applications, a Californium $252\left({}^{252} \text{Cf}\right)$ source was used to inject errors on the memory cells of a test vehicle to verify the error correction scheme embedded in the Level-1 (L1) and Level-2 (L2) cache of the processors. An issue, that could have caused a significant detrimental effect on the radiation performance of the processor, was identified, and delimited to the $\mathbf{L 2}$ cache. The ${}^{252} \mathbf{C f}$ source allowed the authors to do a quick validation of the $L 2$ cache, to test a software workaround and kick-off a new revision of the chip. Breaking tradition, the ${}^{252}$ Cf source was used as an alpha emitter instead of a heavy ion emitter. This work aims at showing that ${}^{252} \text{Cf}$ sources, long disused for SEE testing, may still be useful for the injection of SEUs in the memory cells of submicron ICs. Error maps generated with alpha particles are also compared against proton and heavy ion's induced error maps.