Design and Analysis of a Wide Input Voltage Range Low-Dropout Regulator in TSMC 180nm BCD Technology

This paper presents the design and simulation of a low-dropout (LDO) linear voltage regulator intended for integration in high-voltage DC-DC converter systems. Implemented in a 180 nm BCD CMOS process, the proposed LDO supports an input voltage range of 8 V to 60 V and provides a regulated 5 V output with up to 20 mA load current. A custom three-stage error amplifier is introduced, combining low-voltage signal processing with high-voltage interfacing, while a self-biased startup circuit ensures reliable operation across process, voltage, and temperature (PVT) variations. The LDO achieves a worst-case quiescent current of 95.5 µA at 60 V input and 125 °C, and demonstrates excellent line and load regulation of 0.075 mV/V and 0.215 mV/mA, respectively. Power supply rejection reaches –60 dB at 1 kHz under nominal conditions. Compared with recent state-of-the-art designs, this work achieves a favorable balance of wide input range, regulation precision, and power efficiency, making it well suited for analog and digital internal supply rails in automotive and industrial applications.