Numerical Analysis of the Effect of Coplanarity of Cu Bumps on Flip-Chip Bonding for Chip-On-Flex

This paper presents numerical simulation of the effect of coplanarity of Cu pillars (or bumps) on Si chip flip-chip bonding onto a flexible substrate. It assumes that the Cu bumps are grown with same height and diameter both Si chip and flexible substrate and the adhesive materials such as solder, conductive adhesive have been intentionally omitted between the two bumps. The materials in this model has been defined as linear elastic, while Cu is defined as elastoplastic one. A quarter model has been built to reduce simulation time. An external load is force applied on top of Si chip as is flip-chip bonding. The effect of the Si chip dimension and Cu bumps on the reliability of the assembly has been first examined. The maximum bonding force allowable to polymer substrate is used as reliability criterium that the maximum compressive pressure on the flexible substrate should be less than the material's tensile strength. It is found that Si chip size is more critical than mechanical resistance of the Cu bumps, or the larger Si chip having the same Cu bumps dimension can provide homogeneous pressure distribution on the Cu bumps interface. Next, coplanarity of the Cu bumps considering the electroplating process height uniformity among the Cu bumps has been studied. The bonding force required to overcome $2 \mu\mathrm{m}$ coplanarity at the center of the Cu bumps array has increased to 110 N from 10 N with that of the zero coplanarity. In case of multiple Cu bumps coplanarity, the compressive stresses created in the polymer substrate may have reliability issues due to relatively high pressure at the Si chip edge area.