Vertical CMOS Inverter With LTPO Technology for Circuit Applications in Active-Matrix Display

A CMOS inverter using low-temperature polycrystalline silicon and oxide thin-film transistors (LTPO TFTs) with 3-D structure was proposed for narrow-bezel and high-resolution active-matrix organic light-emitting diode (AMOLED) display. To reduce the bezel area, an n-type indium-gallium-zinc oxide (IGZO) TFT was fabricated in the vertically aligned same position on a p-type low-temperature polycrystalline silicon (LTPS) TFT without additional photograph mask and process compared to conventional planar CMOS inverter. As a result, the effective circuit area was drastically reduced from 1581 to $775~\mu $ m2. Since the IGZO TFT and LTPS TFT shared one gate electrode in the vertical CMOS inverter, the IGZO TFT has a dual gate structure leading to the enhancement of the electrical performance and stability of the IGZO TFT. Thus, the linear mobility of the IGZO TFT in the vertical CMOS inverter was improved from 5.55 to 7.75 cm2/Vs and the voltage gain of the vertical CMOS inverter was improved from 112.95 to 140.20 V/V compared to that in the planar inverter. Furthermore, the positive bias stress (PBS) stability of the vertical CMOS inverter was improved, resulting in the decrease of voltage transfer curve (VTC) shift from 0.63 to 0.25 V after applying a positive unipolar pulse with a pulsewidth of $20~\mu $ s and pulse amplitude of 5 V at ${V} _{\text {DD}} =5$ V and ${V} _{\text {SS}} \,\, =0$ V.