FPGA-Based Implementation of 1's and 2's Complement on Kintex Board: Evaluating Power and Thermal Management

As the demand for energy-efficient digital systems develops, circuits that limit power consumption and facilitate green communication are becoming increasingly crucial to design. This study focuses on designing and implementing 1's and 2's complement arithmetic circuits on the Kintex FPGA board, emphasizing thermal efficiency and energy economy. The entire power usage of the 1's complement circuit is 1.074W, but the 2's complement circuit needs 1.594W. Additionally, the thermal study showed that the complement circuits of 1s and 2s complement have heat margins of 58°C and 72.7°C, respectively. These results indicate how the Kintex FPGA may be leveraged as an energy-efficient platform for digital design that balances hardware performance and power consumption, thereby furthering the objectives of green communication.