A 6µW ECG-Recording ΔΣ Modulator with Internal-Capacitor-Flipping Technique for 34Vpp Common-Mode-Interference (CMI) Tolerance and 1Vpp Input Range

A two-electrode ECG system is widely used in wearable devices for continuous cardiac and cardiovascular health status monitoring, but several challenges must be addressed for reliable signal acquisition. One of the key challenges is the 50/60Hz common-mode interference (CMI) of several volts or more, caused by coupling between the body and powerline, resulting in saturation of the ECG-recording front-end circuit. To address this, ECG-recording ICs tolerant to a large CMI have been actively researched [1]–[7]. Two representative techniques are CM charge compensation (CMCC) [1]–[6] and CM averaging (CMA) [7] (Fig. 1 (top)). In the CMCC approach, CMI can be cancelled through charge compensation using switched capacitors [1]–[3] or current sources [4]–[6]. However, implementing such an additional compensation circuit and its controller incurs additional area consumption and significant power overhead. The work reported in [3] proposes a circuit implementing CMCC without a controller to minimize the circuit overhead, but compensation circuit overhead still remains. Moreover, the CMCC circuit adds extra noise to the ECG-recording system, degrading the noise performance [1]. In the CMA approach, the whole ECG-recording circuit ground is driven by the detected CMI to nullify the effect of CMI. However, its CMI tolerance performance is sensitive to the parasitic capacitance $(\mathrm{C}_{\mathrm{P}}]$ present between the circuit ground and earth ground. Since Cp varies significantly as the surrounding environment changes, very large averaging capacitors (CAVG) and high-driving-capability buffers are needed to provide sufficient CMI tolerance even for the worst-case CP, resulting in large area and power overhead. Another key challenge is motion artifacts (MAs), which are caused by user movement and contain significant differential-mode (DM) components. A wide input range is required for securing tolerance against MAs. Importantly, all these prior designs addressing the CMI challenge [1]–[7] are based on the conventional ECG-recording circuit structure consisting of an instrumentation amplifier (IA) and a SAR ADC. This structure inherently cannot support a wide input range, making them susceptible to MAs. In [6], the MA problem is addressed by tracking and precharging DM artifacts, but this incurs a large power overhead.