GaN-Based Two Stage Point-of-Load (PoL) Converter with 2.5D Embedded Substrate Implementation

The high-density, high-step-down, high-current point-of-load (PoL) converter plays an important role in future computing and AI research. This paper presents a 48-1V POL target that reaches 92% with heterogeneous integration for AL/ML computing chips targeting a full load operation of 100A. This PoL converter will realize a two-stage cascade converter with the first stage being a hybrid switch capacitor converter at 200 kHz. The 2nd stage will be an interleaved 4-phase buck converter, tested at 1 MHz. The PoL package will implement a 2.5D implementation using embedded passive and actives to create an "active substrate" design by using an electrothermal co-design methodology with a goal to create a low parasitic inductance vertical power loop. An embedded prototype will be created using standard PCB manufacturing methods to create the smallest possible area. Different PCB substrates such as insulated metal core (IMS) PCBs will be explored to combine both the electrical and thermal design into a single package. Finally, a 3D implementation will be explored to improve modularity and to reach higher current demands.