Free-Hand-Sketched Logic Circuit Detection Using Vision Transformers

This paper investigates the application of Vision Transformers (ViTs), specifically DETR (DEtection TRans-former), for the detection and classification of digital logic gates in hand-sketched digital logic circuits (DLC). A novel dataset of 295 hand-sketched DLC images was developed, capturing all seven fundamental gate types: AND, OR, NOT, NAND, NOR, XOR, and XNOR. The dataset introduces real-world complexities, such as variations in sketching styles, pen types, and paper textures, therefore addressing gaps in existing datasets. The performance of DETR is compared with the state-of-the-art YOLOv8 model under various preprocessing configurations, including grayscale conversion and image resizing. The results show that YOLO achieves higher overall detection accuracy, while DETR demon-strates strengths in capturing spatial relationships and complex patterns in abstract sketches. Additionally, the study analyses the effects of training duration and dataset structure on performance, highlighting the sensitivity of ViTs to preprocessing and spatial feature preservation. This work advances the understanding of transformer-based models for DLC recognition, advancing the way for more effective automated tools in engineering and education.