Area-efficient design and UVM based functional verification of APB-UART peripheral

The Universal Asynchronous Receiver/Transmitter (UART) is the most common used communication protocol in micro-controllers and applications ranging from embedded systems to telecommunications. The open-source UART code available for research community is Wishbone compatible; however, it has been reported in the technical literature that Advanced Peripheral Bus (APB) protocol is now generally used in modern System on Chips (SoCs). Therefore, to address this gap, in this paper the APB-UART peripheral is first designed and later Universal Verification Methodology (UVM) is used to verify the functional correctness of the proposed design. The designed APB-UART is full duplex, configurable for different baud rate generations, checks for parity and have parametrizable data frame features. The proposed design acheives 100% and 95% functional and code coverage closures. Our designed UVM verification environment is scalable, reusable and the developed soft IP can seamlessly be used in the modern SoCs compatible with APB bus.