Enhanced Security Protocol for VLSI Systems: Modified AES Algorithm for Robust Data Transmission

The development of compact and efficient devices has been made possible by the growth of Very Large Scale Integration (VLSI) technologies, which has transformed modern electronics. However, there are cautions regarding the security of data, especially when it comes to transmission due to the extensive usage of technology. To address these, this study proposes a modified Advanced Encryption Standard (AES) algorithm as a solution for improved security protocol in VLSI systems. The proposed algorithm are intended to support the encryption procedure, increasing stronger production against cryptographic attacks while preserving the system's effectiveness and speed factors that are critical aspects for VLSI applications. Through extensive simulations and testing, the modified AES algorithm demonstrated significant security enhancements the operational efficiency of the VLSI system. The attained outcomes of the proposed work shows that the Modified AES strategy provides a workable technique to protect data in VLSI-based devices while maintaining data communication integrity and confidentiality. The proposed modified AES algorithm demonstrates a significant improvement in performance with a propagation delay of 7 ns, power consumption of 29 mW, and a computational overhead of 62 bits, leading to enhanced efficiency in cryptographic operations. This study highlights that the modified AES algorithm improve security in modern electronic systems and maintain performance.