A Mixed-Signal ASIC for ISO 11784/5 Compliant Animal RFID Readers

In this work the design and implementation of a fully integrated ISO 11784/5 RFID reader front-end ASIC is presented, for both HDX and FDX transponder types. The ASIC was designed in a 0.18 μm. CMOS-HV technology, and includes the two analog front-ends which are multiplexed to a single 10-bit, 8-bit ENOB ADC, and a digital signal processing unit. The digital block is integrated by a field-programmable, re-usable, set of IIR filters to further process the RFID signals, working @1.25MSPS and composed of ~ 20k logic gates (61% utilization ratio). The designed ASIC area (PADs not included) is 0.8mm².