Analysis of a Digitizer Circuit With T-Network for Low-Resistance Measurement

An efficient interfacing circuit designed for measuring low resistance ( $R_{X}$ , less than 1 $\Omega $ ) and generating a digital output is presented. The digitizer resistance to digital converter (RDC), circuit utilizes a dual-slope integrator with a T-network in feedback, three single pole single throw (SPDT) switches, and a comparator. Conventional dual-slope integrators face challenges when measuring low $R_{X}$ connected to the inverting terminal, as the high input current causes the op-amp to saturate. Reducing the input voltage to even 0.01 V does not resolve this issue. Alternatively, connecting $R_{X}$ in feedback produces a low output voltage that is susceptible to inherent circuit noise, leading to significant measurement errors. Consequently, no digitizers have been developed to accurately measure $R_{X}$ below $10~{\Omega }$ so far. The circuit overcomes these limitations by using a T-network which enables the incoming current ( $I_{X}$ , 98.09– $71.75~\mu $ A) through $R_{X}$ to amplify the feedback current ( $I_{C}$ ), hence significantly improving sensitivity which is a novel feature. During charging, lead resistance ( $R_{L}$ ) with fixed resistance $R_{3}$ (or $R_{X}$ ) is measured, while during discharging, $R_{X}$ and $R_{L}$ are measured together. Subtracting $R_{L}$ ensures accurate $R_{X}$ measurement, independent of $R_{L}$ , in a two-wire configuration. The circuit is experimentally tested for $R_{X}$ in the range of 0.1–0.9 $\Omega $ (full span) in which the power dissipation ranges from 0.96 to 4.63 nW, while the measurement time varies from 1.29 to 1.51 s. The circuit yields accurate results with an average error of ±0.68% across the full span of $R_{X}$ .