A Review on VLSI Implementation of Proactive Noise Mitigation System for IoT Application

Power dissipation is an important design parameter in Very Large-Scale Integration (VLSI) systems, as it plays a major role in the performance estimation of batteryoperated devices. The review article provides a Power Distribution Network (PDN) system using a proactive noise mitigation system for supply voltage with low noise. This proactive noise mitigation system proposes a lightweight current prediction solution to predict the near future noise and a majorminor voltage regulator (MMVR) design to provide fast and wide-range voltage scaling capability. As the chip density increases and the decrease in the chip size will help to design a low-power consuming and high-performance System on a chip. For this low-noise PDN design, a chip load model is also designed to fill the gap between the PDN design with off-chip and timing information with on-chip. The review article aims to help the researchers to design a supply voltage of a low-noise power distribution network (PDN) system and implement it into an Internet of Things (IoT) application.