Voltage Stress Analysis of Devices in Actively Commutated CSC- HVDC during DC fault

HVDC transmission based on actively commutated current source converter (CSC-HVDC) is a promising technology with no commutation failure risk and a relatively small footprint. However, the RB-IGCT in the converter may suffer from voltage over-stress after a DC fault, which could threaten the operation safety. Therefore, this paper analyzes the voltage stress of CSC-HVDC after fault and derives the analytical expression of the commutation capacitor's voltage during the transient process, which can be used to determine the voltage stress. A voltage stress suppressing method is also proposed and validated through PSCAD/EMTDC simulation.