An Overcurrent Protection Circuit for Low-Dropout Linear Regulators

To address the issue of excessive current in the power transistor during output short-circuit conditions in conventional overcurrent protection circuits for low dropout regulators (LDOs), this paper presents a novel overcurrent protection circuit for LDOs. By employing a common-source common-gate current mirror and voltage clamping principles, the sampling accuracy of the output current is enhanced. Additionally, a bypass branch is introduced to reduce the output current of the power transistor when the output voltage drops too low. Simulations using Cadence software demonstrate that the proposed overcurrent protection circuit effectively limits the current in the power transistor during output short-circuit conditions. Under an input voltage of 7 V, the LDO output voltage remains stable at 5 V, and when the output voltage drops to 0 V, the power transistor’s output current is reduced to $\mathbf{3 8 0. 4 0 2 \mu \mathrm { A }}$.