Comprehensive Measurement and Cross-Sectional Study of Decoupling Capacitor Interconnect Inductance

The inductance associated with a decoupling capacitor (decap) is represented by its equivalent series inductance (ESL). However, the supplier specified ESL model pertains to a specific physical mounting situation. When mounted on printed circuit board, the datasheet ESL values do not accurately reflect the actual inductance, because of the mounting method and coupling with nearby structures, including connections to return planes through traces and vias. This inductance, ${{\bm{L}}_{\mathbf{above}}}$, is influenced by the decap's connection pattern. Although larger package capacitors are generally assumed to lead to higher loop inductance, our measurements indicated that larger capacitors do not necessarily result in higher ${{\bm{L}}_{\mathbf{above}}}$. The inner geometry of the capacitor and mounting structure was found to significantly influence ${{\bm{L}}_{\mathbf{above}}}$. This study examined the effects of inner geometry on decap inductance, validated through extensive simulations and measurements. ${{\bm{L}}_{\mathbf{above}}}$ measurements for 31 types of decaps across four package sizes (0402 to 1206), with six samples tested per capacitor type, revealed overlapping inductance across sizes. Cross-sectional measurements indicated the exact electrode geometry. The determined geometry showed strong correlations between simulated and measured ${{\bm{L}}_{\mathbf{above}}}$ results, thus supporting the investigation of the effects of inner geometry on inductance. The relationship between ${{\bm{L}}_{\mathbf{above}}}$ and placement orientation was additionally examined.