Analyzing Short Gate and Independent Gate Behaviour of a Non-Aligned Double Gate FET in TCAD Environment

With improved channel control double gate MOS devices has the potential to reduce the complexity of the digital circuits. This work discusses 40 nm channel length non-aligned double gate MOS devices i.e., NADGFET performance under different gate bias condition. A metal work function of 4.75 eV is used as gate metal. A low-k (Silicon dioxide), and high-k (Hafnium dioxide) gate oxide materials were used in this work. The work simulates the device with different doping concentrations and result shows with 10¹⁴ cm⁻³ acceptor concentration and 10²⁰ cm⁻³ donor concentrations is the best choice. The work then simulates and analyses the performance of NADGFET devices in two modes i.e., Short Gate (SG) and Independent Gate (IG). The SG mode with low-k, and high-k gate material in NADGNFET results an ION of 9.41 $\mathbf{mA}/\mu \mathbf{m}$, and 11.84 $\mathbf{mA}/\mu\mathbf{m}$, respectively. Whereas NADGPFET device results an ION of 9.28 $\mathbf{mA}/\mu \mathbf{m}$, and 14.1 $\mathbf{mA}/\mu \mathbf{m}$, respectively. In IG mode, by deactivating one side of the channel, NADGNFET device results an ION of 3.86 $\mathbf{mA}/\mu\mathbf{m}$, and 5.8 $\mathbf{mA}/\mu\mathbf{m}$, respectively, whereas NADGPFET device results ION of 4.7 $\mathbf{mA}/\mu \mathbf{m}$, and 9 $\mathbf{mA}/\mu \mathbf{m}$, respectively. With a non-alignment of 50%, the NADGFET devices operating in IG mode also shows a good control over the channel. This feature can be used to design the digital circuits with reduced complexity.