Boosting System-on-Chip Performance Through AI-Assisted Optimization Using Compositional Neural Networks

System-on-Chip performance verification and optimization at pre-silicon level is a complex task that involves tuning multiple parameters, including clock frequency, voltage supply, routing constraints etc., to meet performance targets. Traditional manual optimization methods are time-consuming, error-prone, and lead to sub-optimal results and significant design iterations. To overcome these challenges, this paper proposes a novel AI-assisted SOC performance optimization framework that leverages the power of compositionality of Artificial Neural Networks. The proposed framework consists of three stages. In the first stage, neural models at different component/cluster interfaces are developed and trained on a large dataset of a given SOC with respective performance metrics to predict their performance based on their design parameters. In the second stage, the neural networks at every interface guide a search algorithm to find optimal design configuration values for a given performance target. Finally, SOC level compositional neural network is implemented using all the interface level parameters for the design. The proposed framework's novelty lies in the use of compositionality of ANNs, that capture complex relationships between the design parameters and performance metrics. This approach reduces training time and enables the optimization of complex SOC designs. Finally, the accuracy of such composed neural models ensures that our compositional technique is efficient and hence provides a promising solution in addressing the challenges of SOC performance optimization, with improved performance and reduced SOC validation time.