Fast Bit-Sliced VLSI Architectures on FPGA for Montgomery Domain Modular Inversion

Modular inversion computation forms a crucial component in Elliptic Curve Cryptosystems. In this paper, we have proposed a fast VLSI architecture for Kaliski's Montgomery domain modular inversion al-gorithm using bit-sliced design paradigm. Logic sharing among functional modules and direct configuration of the FPGA logic primitives were adopted to reduce the critical path wherever possible. The hardwired carry chain fabric of FPGA was exploited to bring down the critical path delay. The entire design flow was implemented on modern day FPGA family and the post-implementation timing simulation results are reported.