Multilevel Digital Twin of Power Electronics based on Degradable Wide-Bandgap Semiconductors for State-of-Health Estimation

This article presents the development of a multilevel digital twin for power electronics, designed to account for processes at both the electrical system level and the semiconductor SiC device level, including transient dynamics. The use of a current-adaptive system in the digital twin enables the evaluation of duty cycles, a key factor in calculating heat losses in power electronics, separately for MOSFETs and body diodes. A precise thermal model enables accurate reproduction of dynamic junction temperature processes, with peak temperature errors within ±5°C and average errors within ±2.4°C. Experimental data of a temperature-sensitive electrical parameter, here the on-state drain-source voltage, is incorporated into the digital twin as a 3-dimentional lookup table, which is scaled according to its exponential degradation behavior. The digital twin's accuracy is validated through a Power-Hardware-in-the-Loop setup using two 3-phase 50 kW inverters. This digital twin, implemented on dSPACE SCALEXIO for real-time operation, can be utilized for reliability studies, remaining useful life estimation, and exploring “what-if” scenarios in power electronics.