Design and Implementation of High Performance Energy Efficient MAC Unit for Emerging Applications

Shrinking of CMOS technology resulted in reduced area with increased complexity of the circuits. This advancement in CMOS technology leads to more and more power consumption in very large scale integrated (VLSI) circuits. Due to increase in portability of devices, power consumption is considered as important specification parallel to speed and area of VLSI circuits. Hence design of low power integrated circuits in CMOS technology has become very active and rapidly developing field. Multiply and Accumulator (MAC) unit is important computational part of all Digital Signal Processors (DSPs). Performance of MAC unit has significant effect on performance of digital signal processors in terms of speed and power dissipation. Hence it is necessary to design low power MAC unit without affecting the performance of the device. This paper describes design of MAC unit that reduces power consumption by using the dual threshold voltage $(V_{th})$ approach.