High speed near threshold schmitt-trigger transmission gate based 11T CNTFET SRAM cell

The exceptional transport characteristics, better current performance, and improved gate control of CNTFET makes them a highly potential substitute for conventional CMOS transistors. In this study a high speed near threshold (Vth) Schmitt-trigger transmission gate based 11 transistor (STTG 11T) CNTFET SRAM cell is introduced to improvise delays and Ion/Ioff ratio. The proposed STTG 11T demonstrates up to 2.22×/124.45×/1.62×10⁶× better read delay (TRA), write delay (TWA), and Ion/Ioff ratio respectively, in comparison to the other cells that are being examined. It shows a comparable leakage & dynamic power consumption, as well as read and write stability. The simulation runs with a supply voltage (VDD) of 0.43 V using the Stanford University 32 nm CNTFET model and Cadence Virtuoso.