Vending Machine Using Verilog (FPGA)

The design and implementation of a vending machine system using Verilog HDL on an FPGA board. The vending machine is equipped with multiple states including product selection, amount selection, dispensing, out-of-stock detection, refund processing, change calculation, and system reset. The project aims to demonstrate the integration of hardware description language (Verilog) with FPGA technology to create a functional vending machine prototype.The design process involved the decomposition of the vending machine's functionality into smaller modules, each responsible for a specific task. These modules were then integrated to form the complete system. The Finite State Machine (FSM) methodology was employed to model the different states and transitions within the vending machine, ensuring sequential operation and proper functionality.