Smart and Sustainable: Verilog HDL Integration in Laundry Machine

Efficient Laundry machine control systems are essential for modern appliances. In this study, we explored the use of Verilog Hardware Description Language (HDL) to improve laundry machine control systems. Our study, which is based on a finite state machine (FSM) model, attempts to improve laundry cycles and user interactions. Unlike traditional laundry machines with limited controls and fixed timers, our design introduces multiple laundry modes tailored to different fabric types, each with specific timers for user customization. Our design highlights the integration of load sensors to detect laundry weight, assisting users in selecting appropriate modes and preventing operation if the load exceeds a set threshold. A temperature sensor ensures the water temperature is maintained as per user input, optimizing cleaning efficiency and energy use. Additionally, the design includes a safety feature allowing users to pause the laundry process by opening the lid to add extra load at any stage, ensuring user safety. The smart functionality of our laundry machine is driven by its adaptable modes with dedicated timers, enhanced safety mechanisms, and sustainability features through sensor integration. These advancements collectively contribute to a more intelligent, user-friendly, and energy-efficient laundry machine design.