Cryogenic and RF Modeling of On-Chip Passive Devices for Quantum Computer

This paper discusses modeling of on-chip passive devices in cryo-CMOS for quantum computers. To solve scaling problem of quantum computer, frontend IC working at cryogenic environment is a promising technology. There are many reports of frontend IC in 4-K stage in dilution refrigerator, but cryogenic device modeling still has some unclear points. For future fine-tuned circuit design, it is important to establish proper device model in cryogenic environment. This paper focuses on passive devices which are key for analog/RF blocks. In cryogenic environment, the resistivity of metal wire is no longer a constant. Numerical simulations reveals that we need size-dependent and frequency-dependent resistivity for accurate modeling of wire resistance.