Effect of Layer Thickness on the Transport Properties of ALD-Deposited ZnO/In2O3 Heterojunction Thin-Film Transistors

Oxide semiconductors have great potential for three-dimensional memory applications due to the wide bandgap, low off-state current, and low thermal budget. This work systematically investigates the effect of layer thicknesses in $\text{ZnO}/\text{In}2\mathrm{O}_{3}$ heterojunctions fabricated via atomic layer deposition on the performance of thin-film transistors. Initially, the effects of deposition temperature on the electrical properties of single-component $\text{In}_2\mathrm{O}_{3}$ and $\text{ZnO}$ thin-film transistors are explored. It was found that at a deposition temperature of 250 $^\circ \mathrm{C}$, an optimal balance between threshold voltage and mobility is achieved. Based on this, heterojunction thin-film transistors with varying thickness ratios of $\text{ZnO}/\text{In}2\mathrm{O}_{3}$ (total thickness of 5 nm) were designed and compared. Electrical performance analysis indicates that the heterojunction thin-film transistor with a $\text{ZnO}/\text{In}2\mathrm{O}_{3}$ thickness ratio of 1.6 nm/3.4 nm exhibits the best overall device performance, with a threshold voltage $(\mathrm{V}_{\text{th}})$ of 0.49 V, a field-effect mobility $(\mu\text{FE})$ of up to 44.7 $\text{cm}^{2}/\mathrm{V}\cdot \mathrm{s}$, a subthreshold swing as low as 90 mV/dec, and an on/off current ratio as high as $10^{9}$.