Effect of Cascade Current Density and Plating Time on TSV Filling Effect in DC Power Supply

This study investigates the influence of different current densities and plating times on the filling effect of TSVs (Through-Silicon Vias) of different sizes. A titrator and recirculating cooling water system were employed to ensure the variation in additive concentration and maintain the electrolyte temperature during TSV copper plating. Through multiple rounds of experiments, the effects of process parameters such as current density and plating time were systematically studied, exploring their impacts on the filling effect of TSVs. The results indicate that excessive current density and duty cycle (plating time: idle time) can lead to defects in the copper pillars. In the step staircase DC plating, as the current density increases and then decreases, the TSV copper plating effect is further optimized, with a gradual reduction in the duty cycle strengthening the optimization effect of TSV copper plating. The findings provide important experimental support for optimizing TSV copper plating technology, reducing TSV copper plating costs, and further investigating the growth mechanism of TSV copper plating, thereby contributing to the improvement of the reliability and filling effect of TSV copper plating.