Advanced Viafill Reliability Using Direct Metallization Technology (IMPACT 2024)

As technology advances, the need for more difficult and complex board designs continues as well. An increasing number of boards require microvias for functionality with the range of via sizes expanding to span very small and very large vias with wide ranges of aspect ratios. Increased density of vias and finer features have further reduced the line and space requirements to below 25/25 μm. This in turn requires reduced etching during the primary metallization process and new and improved viafill technology. Using a wet etch process, we can reduce the etch rate required in processing to below 1 μm. Further, by studying the interaction between the direct metallization coating and the viafill copper processing, both processes can be optimized to minimize etching, reduce copper budget, and further increase line and space capability. The study was split into two parts: the first to minimize etching required throughout the direct metallization process, and the second to optimize viafill to ensure the thinnest plating copper thickness as possible. We study the conductivity and resistance of the direct metallization layer, allowing us to minimize propagation time and maximize viafill. From there we optimize the viafill chemistry to fill as quickly as possible, reducing copper plating on the surface. Linking the performance of the direct metallization and viafill copper processes allows for a better understanding of the interactions between these two processes and improves the overall performance of the board.