Analysis of Propagation Paths with Respect to Induced Transient Noise for Interconnect Designs

Abstract: In this paper an approach for the analysis of the noise distribution with respect to the transient induced impulses into a system of interconnections structures is presented. The approach is based on the determination and classification of the dominant propagation paths relating a noise source and an integrated circuit device pin. The noise paths are evaluated by their scattering-parameters in the frequency domain. The nonlinear behavior of the chip port is included into the signal paths analysis considering spice buffer models. The transient analysis of the whole signal path is performed using the spice circuit simulator. The results of such analysis may be used to predict the signal failures at a specified chip pin and the possibly associated critical signal traces.