A 2-18G Multi-Stage Distributed Amplifier Using Chebyshev Matching Network for Efficiency Enhancement

This article presents a quadruple-stackced CMOS distributed power amplifier (DPA)implemented in 65nm CMOS process. To enhance the output power and power added efficiency, A Chebyshev artificial transmission line is used as output matching network, while a one-stage DPA works as a preamplifier for wideband matching and gain enhancement. The DPA provides 20.5-dB gain and 35-GHz 3-dB BW from 2 to 37GHz with gain variation of $\pm0.65\text{ dE }$ from 2-34G. The DPA realizes 17.4-20.5 $\mathbf{P}_{sat}, 13.7-16.6 \text{OP}_{1dB}$ from 2-18G with the maximum 24.9% PAE at 2 GHz.