Total Ionizing Dose Effects on the Performance and Hot Carrier Degradation of LDMOS Transistors

Lateral double diffused MOS (LDMOS) transistors have found numerous applications as radio-frequency and power amplifiers in a variety of systems, including satellite communications and high-energy physics experiments. While the LDMOS transistors used in these systems have inherent reliability issues, such as hot carrier degradation (HCD), they are simultaneously subjected to high radiation. Therefore, it is essential to understand how the interface traps created during radiation interact with those created during the HCD stress of these transistors. In this article, we: 1) subject the LDMOS transistors to various total ionizing doses (TIDs) of gamma radiation and HCD stress; 2) use the super single-pulse charge pumping (CP) technique to quantify the generation of interface traps ( $\Delta {N}_{\text {IT}}$ ) and trapped charges ( $\Delta {N}_{\text {OT}}$ ); 3) study the combined effect of HCD and TID in terms of threshold voltage shift ( $\Delta {V}_{\text {TH}}$ ) and linear drain current degradation ( $\Delta {I}_{{D},\text {lin}}$ ); 4) describe the correlation between HCD and TID using well-known physics-based models; and 5) compare our findings with that of an LDMOS of varied geometry, dimension, and bias, illustrating that the model and inferences drawn from the conclusions of this article can be applied to other LDMOS devices as well. This article establishes that the physics of HCD is universal and takes us a step closer to a generalized HCD model for power FETs.