Effective Routing Probability Maps via Convolutional Neural Networks for Analog IC Layout Automation

The use of electronic design automation methodologies for analog integrated circuit routing has long presented a challenge due to both layout-dependent and intra/inter-net effects that impact performance. Existing solutions allow for the routing generation to focus on specific criteria for faster results or by searching the solution space as much as possible, primarily via path finding or evolutionary algorithms (EAs). Recent research has proposed using machine learning models to create routing probability maps, learning from human design expertise, and assisting the typically tedious process of manual routing. This paper takes one step further by exploiting convolutional neural networks to take advantage of existing, well-performing routing algorithms, to produce high-quality training data easily. Initial tests show promising results generalizing beyond training data, with the suggested per-net probability maps providing competent initial routing solutions or preferred routing regions, which can then be further optimized or embedded on existing routing approaches, such as on concurrent EA-based.