A Comprehensive Analysis of Safe Operating Area Limits in Ferroelectric-Based DEMOS

In this work, safe operating area (SOA) limit of a conventional drain extended metal oxide semiconductor (DEMOS) and a ferroelectric-based DEMOS (FDEMOS) is investigated. Through qualitative analysis of their breakdown under electrostatic discharge (ESD) stress conditions using the transmission line pulsing (TLP) method, we compare the electrical-SOA boundaries. Tradeoffs associated with SOA of FDEMOS are investigated in detail including enhanced transconductance, improved subthreshold swing (SS) (due to negative capacitance (NC) property), and reduced breakdown voltage. Under gate-grounded configuration with iso-off conditions, we found that FDEMOS shows a slight reduction in breakdown voltage while maintaining comparable power figure of merit (PFOM) to DEMOS. At ${V}_{g} =0.8$ V ( ${V}_{\text {OV}}~\sim ~0.2$ V), FDEMOS shows a 9% decrease in breakdown voltage, resulting in a substantial 57% improvement in ON-resistance and a $2\times $ increase in PFOM. However, at ${V}_{g} =1.8$ V ( ${V}_{\text {dd}}$ ), there is only a 9% improvement in ON-resistance along with a 23% degradation in breakdown voltage, which lowers the PFOM. The improvement in ON-resistance with FDEMOS significantly enhances the PFOMs for lower gate voltages. FDEMOS is found to be superior to DEMOS when operating under low gate voltages.