Monolithic Integration of GaAs-Based Darlington Cascode With Multifinger and Nonuniform Spacing Emitter

In this article, we demonstrate the fabrication of the Darlington cascode by monolithically integrating two InGaP/GaAs heterojunction bipolar transistors (HBTs) with one AlGaAs/InGaAs pseudomorphic high electron mobility transistor (pHEMT) from a GaAs-based bipolar high electron mobility transistor (BiHEMT) epitaxial wafer. To mitigate the thermal coupling effect and increase the collector current in the high current HBTs, two main techniques are investigated to fabricate the Darlington pair, nonuniform spacing among the multifinger emitter and interdigitated connection between emitter and base. The optimized integrated Darlington cascode configuration with a gate width of 20 mm of pHEMT exhibits a collector current of 580 mA, a current gain of 5337 at ${V}_{\text {BE}} =3$ V, and a current degradation of only 16% at 450 K compared to 300 K. Besides, no current collapse phenomenon due to thermal effect is observed at high currents. In addition, from the double-pulse test, the optimized Darlington cascode exhibits a fast turn-on time of 48.8 ns, a turn-off time of 49.1 ns, and switching energy losses of 128 and 32.0 nJ during the turn-on and turn-off transients, respectively. The device performs well not just in the output current but also in its switching behavior.