High Performance Analog Switch Based on Body Bias Reduction

A dual channel single pole, single throw analog switch architecture developed in 180 nm CMOS process with low ON resistance is proposed. A technique for diminishing the body bias effect on MOS threshold voltage is used in the transmission gate. The analog switch can work with voltages ranging from 1.6 - 5.5 V, in an extended temperature interval [−55°C÷125°C]. Nanoseconds enable/disable times and a near -100 dB OFF isolation capability are proved.