Reliability of a High Capacitance Density Topographic MIM

Addressing the ever-increasing demand for efficient power integrity requirements necessitated the advent of on-die decoupling capacitors. These capacitors provide high dynamic current throughout switching workloads and reduce power supply droop during microprocessor operation. In this paper, we demonstrate a high reliability Metal-Insulator-Metal (MIM) decoupling capacitor on patterned topography with best-in-class capacitance density, implementable in a standard BEOL stack. Conduction behavior through the HiK dielectric is investigated along with complete characterization of Time Dependent Dielectric Breakdown (TDDB). The MIM capacitor reliability exhibits an intrinsic lifetime of >10 years at 1.32 V operation at 125°C. In addition, this process demonstrates excellent low extrinsic defect density and meets standard JEDEC environmental Reliability requirements. The combination of high capacitance and robust reliability of the integrated topographic MIM process significantly enhances the efficiency of on-chip power delivery and protects against power supply noise.